Digital frequency synthesis techniques are widely used in different systems to generate accurate clock frequencies with great flexibility. At the heart of such systems, there is usually one (or more) Digitally Controlled Oscillator (DCO) or Numerically Controlled Oscillators (NCO). As shown in FIG. 1, these basically consist of a digital accumulator that generates the instantaneous phase (Φ) for a desired output frequency set by a frequency select word (FSW) input. The accumulator is clocked by a system clock. On each system clock cycle, the accumulator adds the previously accumulated value to the current frequency select word FSW to generate an output phase word ϕ.
The accumulator content is often used in downstream blocks to represent the phase of the signal. For example, in direct digital frequency synthesis systems (DDFS) the instantaneous phase (Φ) output by the accumulator drives a digital-to-analog converter (DAC) to generate a well-shaped output signal or it can be used in a phase shifter to move the phase of another clock.
The accuracy of an NCO, or DCO, depends on the register width in the accumulator (N); the larger the number of bits in the accumulator, the higher the accuracy of the synthesized frequency. For example register widths between 24 to 48 bits are commonly used to generate very accurate frequencies.
Since processing a large number of bits in the downstream blocks is not practical only a few most significant bits are kept (M) and the rest are dropped. This function is performed by the quantizer shown in FIG. 1, which in this case truncates the phase word at the accumulator output by dropping the N-M least significant bits.
Truncation is a nonlinear mechanism that generates spurious components in the frequency spectrum of the analog signal. The generated spurious components increase the jitter (defined based on the difference between the truncated phase and output phase of the NCO/DCO (ϕ1−ϕ). The generated spur is in effect the quantization noise due to truncation and is shown in FIG. 2.
Truncation of the phase word thus adds noise to the original accumulator output. It is therefore highly desirable to reduce spur power without increasing the number of bits after truncation.
A number of different techniques exist for reducing the truncation noise. They are generally based on randomization and/or noise shaping concepts. Randomization is usually performed by injecting a dither signal to disturb the periodicity and spread the spurs in the frequency domain. The dither signal is added to the phase values before truncation. Both random sequences and deterministic signals have been used for dithering. Such techniques spread the power of the spurs over a wider band at the cost of adding more noise and raising the noise floor. Post filtering can alleviate this problem but often it is not practical and/or efficient.
A different approach is based on noise shaping, often with a delta-sigma modulator, in which spur power is pushed out of the frequency band of interest. For such methods to be effective, a large oversampling ratio is usually required which is not always possible due to speed limitation of real circuits.